In today's world more and more applications are using ethernet for connectivity. Not only to interconnect systems on a large scale, but to also interconnect integrated circuits (ICs) on a small scale. Using ethernet to connect ICs, though, typically involves using a switch. However, most layer-2 type switches have simple or limited buffer management or flow control. Moreover, the ICs themselves typically are not suited for consuming bursty traffic and can overflow their buffers using simple layer-2 switching.
One attempt to resolve this issue is the use of pause frames to pause the traffic forwarded by these simple layer-2 type switches. In response to receiving a pause frame, these simple layer-2 type switches pause all traffic on output ports from the switch. However, this can operate to inflict latency on flows to devices that are not in danger of buffer overflow. Solutions to this problem typically focus on increasing the intelligence of the layer-2 type switch, in order to selectively pause outgoing flows from the switch.
Like reference numbers and designations in the various drawings indicate like elements.